ACNV260E 2mm dti, 10mbd digital optocoupler data sheet caution: it is advised that normal static precautions be taken in handling and assembly of this component to prevent damage and/or degradation which may be induced by esd. description the new ACNV260E is an optically coupled gate that combines a algaas light emitting diode and an inte - grated photo detector housed in a widebody package. ACNV260E is designed and manufactured to comply with en60079-11 atex and iecex. the distance-through- insulation (dti) between the emitting diode and photo- detector is at 2mm. the output of the detector ic is an open collector schottky clamped transistor. the internal shield provides a guaranteed common mode transient immunity specifcation of 20,000 v/ s at v cm = 1500v this unique design provides maximum ac and dc circuit isolation while achieving ttl compatibility. the new ACNV260E is suitable for high speed logic inter - facing, input/output bufering, as line receivers in envi - ronments that conventional line receivers cannot tolerate and are recommended for use in extremely high ground or induced noise environments. functional diagram 10 2 3 1 9 8 4 5 7 6 anode cathode nc nc nc vcc ve vo gnd nc shield features ? compliant to en60079-11 atex and iecex (375v) ? 2mm dti ? 13mm creepage and clearance ? 20 kv/ s minimum common mode rejection (cmr) at vcm = 1500 v ? high speed: 10 mbd typical ? ttl compatible ? guaranteed ac and dc performance over temperature: -40c to +105c ? available in 10-pin widebody packages ? safety approval C approval at 5000 vrms for 1 minute per ul1577 C csa applications ? high voltage insulation ? intrinsic safety circuit ? pcb board power system isolation ? industrial equipment power isolation a 0.1 f bypass capacitor must be connected between pins v cc and gnd. truth table (positive logic) led enable output on h l of h h on l h of l h on nc l of nc h
2 ordering information ACNV260E is ul recognized with 5000 vrms for 1 minute per ul1577. part number option package surface mount gull wing tape & reel ul 5000 v rms / 1 minute rating quantity rohs compliant ACNV260E -000e 500 mil dip-10 x 35 per tube -300e x x x 35 per tube -500e x x x x 500 per reel to order, choose a part number from the part number column and combine with the desired option from the option column to form an order entry. example 1: ACNV260E-500e to order product of 500mil dip-10 widebody with gull wing surface mount package in tape and reel packaging with ul 5000vrms/1min safety approval in rohs compliant. option datasheets are available. contact your avago sales representative or authorized distributor for information. schematic use of a 0.1 f bypass capacitor connected between pins of 7 and 10 is recommended (see note 5). shield 10 8 7 2+ 3 v f ? i f i cc v cc v o gnd i o v e i e 9
3 10-pin widebody (500mils) dip package 10-pin widebody (500mils) dip package with gull wing surface mount option 300 dimensions in inches [millimeters] [13.71 0.15] 0.540 0.006 [11.01 0.15] 0.433 0.006 [13.01 0.15] 0.512 0.006 [11.01 0.15] 0.433 0.006 [1.998] 0.08 [5.25] 0.21 [13.06] 0.514 +0.08 -0.05 +0.003 -0.002 [0.25 ] 0.010 5 typ [1.30] 0.05 typ [5.25] 0.207 [1.78 0.15] 0.070 0.006 [2.54] 0.10 typ [0.51] 0.020 min [0.48 0.08] 0.019 0.003 [3.10] 0.122 [3.90] 0.154 dimension in inches [millimeter] land pattern recommendation [13.71 0.15] 0.540 0.006 [11.01 0.15] 0.433 0.006 [16.35 0.15] 0.644 0.006 [1.78 0.15] 0.070 0.006 [0.75 0.15] 0.030 0.006 [1.00 0.15] 0.039 0.006 [14.90 0.15] 0.587 0.006 [13.01 0.15] 0.512 0.006 [2.29 0.15] 0.090 0.006 [1.30 0.15] 0.051 0.006 [2.29 0.15] 0.090 0.006 [1.30] 0.051 typ max [5.25] 0.207 5 nom +0.076 -0.051 +0.003 -0.002 [0.254 ] 0.010
4 solder refow profle recommended refow condition as per jedec standard, j-std-020 (latest revision). non-halide flux should be used. insulation and safety related specifcations parameter symbol ACNV260E units conditions minimum external air gap (external clearance) l(101) 13 mm measured from input terminals to output terminals, shortest distance through air. minimum external tracking (external creepage) l(102) 13 mm measured from input terminals to output terminals, shortest distance path along body. minimum internal plastic gap (internal clearance) 2.0 mm through insulation distance conductor to conductor, usually the straight line distance thickness between the emitter and detector. minimum internal tracking (internal creepage) 4.6 mm measured from input terminals to output terminals, along internal cavity. tracking resistance (comparative tracking index) cti 200 v din iec 112/vde 0303 part 1. maximum working insulation voltage v iorm 375 v peak per iec 60079-11. safety-limiting values C maximum values allowed in the event of a failure. case temperature t s 150 c input current** i s, input 400 ma output power** p s, output 1 w isolation group iiia material group (din vde 0110, 1/89, table 1). note: ** refer to figure 14 for dependence of ps and is on ambient temperature. absolute maximum ratings parameter symbol min. max. units storage temperature t s -55 125 c operating temperature t a -40 105 c average input current i f(avg) 20 ma reverse input voltage v r 3 v input power dissipation p i 40 mw supply voltage (1 minute maximum) v cc 7 v enable input voltage (not to exceed v cc by more than 500mv) v e v cc +0.5 v enable input current i e 5 ma output collector current i o 50 ma output collector voltage v o 7 v output collector power dissipation p o 85 mw lead solder temperature t ls 245c for 10 sec, up to seat plane solder refow temperature profle see package outline drawings section
5 recommended operating conditions parameter symbol min. max. units note input current, low level i fl * 0 250 a input current, high level i fh ** 9 16 ma 1 power supply voltage v cc 4.5 5.5 v low level enable voltage v el 0 0.8 v high level enable voltage v eh 2.0 v cc v operating temperature t a - 40 105 c fan out (at r l = 1k ? ) n 5 ttl loads output pull-up resistor r l 330 4k ? * the of condition can also be guaranteed by ensuring that v fl 0.8volts. ** the initial switching threshold is 8ma or less. it is recommended that 9ma to 16ma be used for best performance and to permit at least a 20% led degradation guardband. electrical specifcations (dc) over recommended operating conditions unless otherwise specifed. all typicals at v cc = 5 v, t a = 25c. parameter symbol min. typ. max. units test conditions fig. note high level output current i oh 5.5 100 a v cc = 5.5 v, v e = 2.0v v o = 5.5 v, i fl = 250 a 12 input threshold current i th 3.5 8 ma v cc = 5.5 v, v e = 2.0v, v o = 0.6 v, i ol > 13 ma 1, 2 12 low level output voltage v ol 0.35 0.6 v v cc = 5.5 v, v e = 2.0v, i f = 8 ma, i ol(sinking) = 13 ma 1, 2, 3, 4 12 high level supply current i cch 7.0 12 ma v e = 0.5v v cc = 5.5 v, i f = 0 ma 6.5 v e = v cc low level supply current i ccl 9.0 13 ma v e = 0.5v v cc = 5.5 v, i f = 10 ma 8.5 v e = v cc high level enable current i eh -0.7 ma v cc = 5.5 v, v e = 2.0v low level enable current i el -0.9 ma v cc = 5.5 v, v e = 0.5v high level enable voltage v eh 2.0 ma v cc = 5.5 v, v e = 2.0v 12 low level enable voltage v el 0.8 ma v cc = 5.5 v, v e = 0.5v input forward voltage v f 1.25 1.64 1.85 v t a = 25c i f = 10 ma 5 1.2 2.05 input reverse breakdown voltage bv r 5 v i r = 100 a, t a = 25c input capacitance c in 60 pf f = 1 mhz, v f = 0 v input diode temperature coefcient v f / t a -1.9 mv/c i f = 10 ma
6 switching specifcations (ac) over recommended temperature (t a = -40c to 105c), v cc = 5 v, i f = 10ma unless otherwise specifed. all typicals are at t a = 25c, v cc = 5v. parameter symbol min. typ. max. units test conditions fig. note propagation delay time to high output level t plh 30 50 80 ns t a = 25c r l = 350 ? , c l = 15 pf 6, 7, 8 3, 12 120 propagation delay time to low output level t phl 35 55 80 ns t a = 25c 4,12 120 pulse width distortion |t phl - t plh | 5 40 ns r l = 350 ? , c l = 15 pf 6, 7, 8, 9 6, 12 propagation delay skew t psk 50 ns 5, 6, 12 output rise time (10%-90%) t r 25 ns 10 12 output fall time (10%-90%) t f 10 ns 10 12 propagation delay time of enable from v eh to v el t elh 30 ns r l = 350 ? , c l = 15 pf, v el = 0v, v eh = 3v 11, 12 7 propagation delay time of enable from v el to v eh t ehl 20 ns r l = 350 ? , c l = 15 pf, v el = 0v, v eh = 3v 11, 12 8 output high level common mode transient immunity |cm h | 20 25 kv/ s v cc = 5 v, i f = 0 ma, v o(min) = 2 v, r l = 350 ? , t a = 25c, v cm = 1500 v 13 9, 11, 12 output low level common mode transient immunity |cm l | 20 25 kv/ s v cc = 5 v, i f = 10 ma, v o(max) = 0.8 v, r l = 350 ? , t a = 25c, v cm = 1500 v 10, 11, 12 package characteristics all typicals at t a = 25c. parameter symbol min. typ. max. units test conditions fig. note input-output insulation v iso 5000 v rms rh < 50% for 1 min. t a = 25c 13, 14 input-output resistance r i-o 10 12 ? v i-o = 500 v 13 input-output capacitance c i-o 0.5 0.6 pf f = 1 mhz, t a = 25c 13 notes: 1. peaking circuits may produce transient input currents up to 50ma, 50ns maximum pulse width, provided average current does not exceed 20ma. 2. by passing of power supply line is required, with a 0.1 f ceramic disc capacitor adjacent to each optocoupler as illustrated in figure 15. total lead length between both ends of the capacitor and the isolator pins should ot exceed 20mm. 3. the t plh propagation delay is measured from the 5 ma point on the falling edge of the input pulse to the 1.5 v point on the rising edge of the output pulse. 4. the t phl propagation delay is measured from the 5 ma point on the rising edge of the input pulse to the 1.5 v point on the falling edge of the output pulse. 5. t psk is equal to the worst case diference in t phl and/or t plh that will be seen between units at any given temperature and specifed test conditions. 6. see application section titled propagation delay, pulse-width distortion and propagation delay skew for more information. 7. the t elh enable propagation delay is measured from the 1.5 v point on the falling edge of the enable input pulse to the 1.5 v point on the rising edge of the output pulse. 8. the t ehl enable propagation delay is measured from the 1.5 v point on the rising edge of the enable input pulse to the 1.5 v point on the falling edge of the output pulse. 9. cm h is the maximum tolerable rate of rise of the common mode voltage to assure that the output will remain in a high logic state (i.e., v o > 2.0 v). 10. cm l is the maximum tolerable rate of fall of the common mode voltage to assure that the output will remain in a low logic state (i.e., v o < 0.8 v). 11. for sinusoidal voltages, (|dv cm | / dt) max = f cm v cm(p-p). 12. no external pull up is required for a high logic state on the enable input. if the v e pin is not used, tying v e to v cc will result in improved cm r performance. 13. device considered a two-terminal device: pins 1, 2, 3, 4 and 5 shorted together, and pins 6, 7, 8, 9 and 10 shorted together. 14. in accordance with ul1577, each optocoupler is proof tested by applying an insulation test voltage 6000 v rms for one second (leakage detection current limit, i i-o 5 a).
7 figure 1. typical output voltage vs. forward input voltage current. figure 2. typical input threshold current vs. temperature. figure 3. typical low level output voltage vs. temperature. figure 4. typical low level output current vs. temperature. figure 5. typical input diode forward characteristic. 0 1 2 3 4 5 6 0 1 2 3 4 5 i f - forward input voltage - ma 0 1 2 3 4 5 6 -60 -40 -20 0 20 40 60 80 100 120 t a - temperature - c i th - input threshold current - ma 0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 -60 -40 -20 0 20 40 60 80 100 120 v ol - low level output voltage - v 20 30 40 50 60 70 -60 -40 -20 0 20 40 60 80 100 120 t a - temperature - c i ol - low level output current - ma 0.001 0.010 0.100 1.000 10.000 100.000 1000.000 1.2 1.3 1.4 1.5 1.6 1.7 1.8 v f - forward voltage - v i f - forward current - ma v o - output voltage - v v cc = 5v t a = 25c r l = 350 ? r l = 1k ? r l = 4k ? v cc = 5.0 v v e = 0.6 v r l = 350 ?, 1k ?, 4k ? t a - temperature - c v cc = 5.5 v v e = 2.0 v i f = 8.0 ma i 0 = 16 ma i 0 = 13 ma i 0 = 9.6 ma i 0 = 6.4 ma i f = 10 ma i f = 14-16 ma i f = 8 ma v cc = 5.5 v v e = 2.0 v v ol = 0.6 v t a = 25c
8 figure 6. test circuit for t phl and t plh figure 7. typical propagation delay vs. temperature. figure 8. typical propagation delay vs. pulse input current. figure 9. typical pulse width distortion vs. temperature. figure 10. typical rise and fall time vs. temperature. 20 30 40 50 60 70 80 90 100 -60 -40 -20 0 20 40 60 80 100 120 t a - temperature - c t p - propagation delay - ns 0 50 100 150 200 250 300 -60 -40 -20 0 20 40 60 80 100 120 t a - temperature - c t r , t f - rise,fall time - ns t plh , r l = 350? t plh , r l = 4k? t plh , r l = 1k? t phl , r l = 350? t phl , r l = 1k? 4k? v cc = 5.0 v t a = 25c v cc = 5.0 v t a = 25c 30 40 50 60 70 80 90 t p - p ro p ag at io n de l ay - n s 8 9 10 11 12 13 14 15 i f - pulse input current - ma t plh , r l = 4k? t phl , r l = 350? t plh , r l = 350? t plh , r l = 1k? t phl , r l = 4k? t phl , r l = 1k? -10 -5 0 5 10 15 20 25 30 35 40 -60 -40 -20 0 20 40 60 80 100 120 t a - temperature - c pwd - pulse width distortion - ns r l = 350? r l = 4k? r l = 1k? v cc = 5.0 v i f = 10.0 ma v cc = 5.0 v i f = 10.0 ma r l = 1k? r l = 4k? r l = 350? r l = 350?, 1k?, 4k? t rise t fall pulse gen. z o = 50? t f = t r = 5 ns i f output v o monitoring node +5 v r l r m 0.1f bypass *c l input monitoring node 1 2 3 4 5 10 9 8 7 6 shield 1.5 v t phl t plh i f input v o output i f = 10 ma i f = 5 ma *c l is approximately 15 pf which includes probe and stray wiring capacitance.
9 figure 11. test circuit for t ehl and t elh . figure 12. typical enable propagation delay vs. temperature. 0 20 40 60 80 100 -60 -40 -20 0 20 40 60 80 100 120 t a - temperature - c t e - enable propagation delay - ns t elh , r l = 4k? t elh , r l = 1k? t elh , r l = 350? t elh , r l = 350?, 1k?, 4k? v cc = 5.0 v v eh = 3.0 v v el = 3.0 v i f = 10.0 ma 1.5 v t ehl t elh v e input v o output 3.0 v 1.5 v *c l is approximately 15 pf which includes probe and stray wiring capacitance. i f 10 ma shield 1 2 3 4 5 10 9 8 7 6 output v o monitoring node +5 v r l *c l 0.1f bypass input v e monitoring node pulse gen. z o = 50? t f = t r = 5 ns
for product information and a complete list of distributors, please go to our web site: www.avagotech.com avago, avago technologies, and the a logo are trademarks of avago technologies in the united states and other countries. data subject to change. copyright ? 2005-2013 avago technologies. all rights reserved. av02-2457en - september 13, 2013 figure 13. test circuit for common mode transient immunity and typical waveforms. figure 14. thermal derating curve, dependence of safety limiting value with case temperature per iec/en/din en60747-5-5. v o 0.5 v v o (min.) 5 v 0 v switch at a: i f = 0 ma switch at b: i f = 10 ma v cm cm h cm l v o (max.) v cm (peak) v o pulse generator z o = 50 ? + v cm ? +5 v 0.1 f bypass output v o monitoring node r l single channel 1 2 3 4 5 10 9 8 7 6 shield i f b a v ff t s - case temperature - c output power - p s , input current - i s 0 100 200 300 400 500 600 700 800 900 1000 1100 0 25 50 75 100 125 150 175 p s (mw) i s (ma) figure 15. recommended printed circuit board layout. gnd bus (back) v cc bus (front) enable 0.1 f 10 mm max. (see note 5) output nc nc nc nc single channel device illustrated.
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